The following text field will produce suggestions that follow it as you type.

Home

Barnes and Noble

A Framework for Automated HW/SW Co-Verification of SystemC Designs using Timed Automata

Unfortunately, this item is no longer available, but we found some similar items you might like.

You May Also Like

Advances in Verification of Time Petri Nets and Timed Automata: A Temporal Logic Approach
Barnes and Noble

Advances in Verification of Time Petri Nets and Timed Automata: A Temporal Logic Approach

From Barnes and Noble
Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout / Edition 1
Barnes and Noble

Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout / Edition 1

From Barnes and Noble
Concurrency Theory: Calculi an Automata for Modelling Untimed and Timed Concurrent Systems / Edition 1
Barnes and Noble

Concurrency Theory: Calculi an Automata for Modelling Untimed and Timed Concurrent Systems / Edition 1

From Barnes and Noble
A Unified Approach for Timing Verification and Delay Fault Testing / Edition 1
Barnes and Noble

A Unified Approach for Timing Verification and Delay Fault Testing / Edition 1

From Barnes and Noble
High-Level Verification: Methods and Tools for Verification of System-Level Designs
Barnes and Noble

High-Level Verification: Methods and Tools for Verification of System-Level Designs

From Barnes and Noble
Heterogeneous SoC Design and Verification: HW/SW Co-Exploration, Co-Design, Co-Verification Co-Debugging
Barnes and Noble

Heterogeneous SoC Design and Verification: HW/SW Co-Exploration, Co-Design, Co-Verification Co-Debugging

From Barnes and Noble
Design Automation for Timing-Driven Layout Synthesis
Barnes and Noble

Design Automation for Timing-Driven Layout Synthesis

From Barnes and Noble
Complete Symbolic Simulation of SystemC Models: Efficient Formal Verification of Finite Non-Terminating Programs
Barnes and Noble

Complete Symbolic Simulation of SystemC Models: Efficient Formal Verification of Finite Non-Terminating Programs

From Barnes and Noble
Compositional Verification of Concurrent and Real-Time Systems / Edition 1
Barnes and Noble

Compositional Verification of Concurrent and Real-Time Systems / Edition 1

From Barnes and Noble
Design Automation of Real-Life Asynchronous Devices and Systems
Barnes and Noble

Design Automation of Real-Life Asynchronous Devices and Systems

From Barnes and Noble
Design Automation of Cyber-Physical Systems
Barnes and Noble

Design Automation of Cyber-Physical Systems

From Barnes and Noble
Digital System Test and Testable Design: Using HDL Models Architectures
Barnes and Noble

Digital System Test and Testable Design: Using HDL Models Architectures

From Barnes and Noble
Handbook of Computer Aided Verification
Barnes and Noble

Handbook of Computer Aided Verification

From Barnes and Noble
Current Trends in Hardware Verification and Automated Theorem Proving / Edition 1
Barnes and Noble

Current Trends in Hardware Verification and Automated Theorem Proving / Edition 1

From Barnes and Noble
Formal Modeling and Analysis of Timed Systems: 8th International Conference, FORMATS 2010, Klosterneuburg, Austria, September 8-10, 2010, Proceedings
Barnes and Noble

Formal Modeling and Analysis of Timed Systems: 8th International Conference, FORMATS 2010, Klosterneuburg, Austria, September 8-10, 2010, Proceedings

From Barnes and Noble
Formal Modeling and Analysis of Timed Systems: 5th International Conference, FORMATS 2007, Salzburg, Austria, October 3-5, 2007, Proceedings
Barnes and Noble

Formal Modeling and Analysis of Timed Systems: 5th International Conference, FORMATS 2007, Salzburg, Austria, October 3-5, 2007, Proceedings

From Barnes and Noble
Powered by Adeptmind